|
| enum class | Order : uint16_t { MSB_FIRST = 0
, LSB_FIRST = SPI_CR1_LSBFIRST
} |
| |
| enum class | ClockDivider : uint8_t {
DIV_2 = 0x00
, DIV_4 = SPI_CR1_BR_0
, DIV_8 = SPI_CR1_BR_1
, DIV_16 = SPI_CR1_BR_1 | SPI_CR1_BR_0
,
DIV_32 = SPI_CR1_BR_2
, DIV_64 = SPI_CR1_BR_2 | SPI_CR1_BR_0
, DIV_128 = SPI_CR1_BR_2 | SPI_CR1_BR_1
, DIV_256 = SPI_CR1_BR
} |
| | SPI Clock divider. More...
|
| |
| enum class | Mode : uint8_t { MODE_0 = 0
, MODE_1 = SPI_CR1_CPHA
, MODE_2 = SPI_CR1_CPOL
, MODE_3 = SPI_CR1_CPOL | SPI_CR1_CPHA
} |
| |
| enum class | WriteBit { NORMAL
, INVERTED
, DISABLED
} |
| |
Driver for STM32 low level SPI peripheral.
This driver applies to the whole STM32F4xx family.
The serial peripheral interface (SPI) allows half/full-duplex, synchronous, serial communication with external devices. The interface can be configured as the master and in this case it provides the communication clock (SCK) to the external slave device. The peripheral is also capable of reliable communication using CRC checking.
SPI main features:
- Full-duplex synchronous transfers on three lines
- 8- or 16-bit transfer frame format selection
- Master or slave operation
- 8 master mode baud rate prescaler (f_PCLK/2 max.)
- Programmable clock polarity and phase
- Programmable data order with MSB-first or LSB-first shifting
- Hardware CRC feature for reliable communication
- DMA capability
1.10.0