Skyward boardcore
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SPIDefs.h
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1/* Copyright (c) 2021 Skyward Experimental Rocketry
2 * Author: Alberto Nidasio
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23#pragma once
24
25#include <interfaces/arch_registers.h>
26#include <stdint.h>
27
28namespace Boardcore
29{
30
52namespace SPI
53{
54
55enum class Order : uint16_t
56{
57 MSB_FIRST = 0,
58 LSB_FIRST = SPI_CR1_LSBFIRST
59};
60
69enum class ClockDivider : uint8_t
70{
71 DIV_2 = 0x00,
72 DIV_4 = SPI_CR1_BR_0,
73 DIV_8 = SPI_CR1_BR_1,
74 DIV_16 = SPI_CR1_BR_1 | SPI_CR1_BR_0,
75 DIV_32 = SPI_CR1_BR_2,
76 DIV_64 = SPI_CR1_BR_2 | SPI_CR1_BR_0,
77 DIV_128 = SPI_CR1_BR_2 | SPI_CR1_BR_1,
78 DIV_256 = SPI_CR1_BR
79};
80
81enum class Mode : uint8_t
82{
84 MODE_0 = 0,
86 MODE_1 = SPI_CR1_CPHA,
88 MODE_2 = SPI_CR1_CPOL,
90 MODE_3 = SPI_CR1_CPOL | SPI_CR1_CPHA
91};
92
93enum class WriteBit
94{
95 NORMAL,
96 INVERTED,
97 DISABLED,
98};
99
100} // namespace SPI
101
102} // namespace Boardcore
@ MODE_0
CPOL = 0, CPHA = 0 -> Clock low when idle, sample on first edge.
@ MODE_2
CPOL = 1, CPHA = 1 -> Clock high when idle, sample on second edge.
@ MODE_1
CPOL = 1, CPHA = 0 -> Clock high when idle, sample on first edge.
ClockDivider
SPI Clock divider.
Definition SPIDefs.h:70
@ DISABLED
Do not set write bit in any way.
@ NORMAL
Normal write bit settings (0 for write, 1 for reads)
@ INVERTED
Inverted write bit settings (1 for write, 0 for reads)
This file includes all the types the logdecoder script will decode.