Skyward boardcore
All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Pages
WIZ5500Defs.h
Go to the documentation of this file.
1/* Copyright (c) 2023 Skyward Experimental Rocketry
2 * Author: Davide Mor
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23#pragma once
24
25#include <cstdint>
26
27namespace Boardcore
28{
29
30namespace Wiz
31{
32
33static constexpr uint8_t VERSION = 0x04;
34
35inline uint8_t buildControlWord(uint8_t block, bool write)
36{
37 return (block & 0b11111) << 3 | (write ? 1 << 2 : 0);
38}
39
40inline uint8_t getSocketRegBlock(int n) { return (n << 2) | 0b01; }
41
42inline uint8_t getSocketTxBlock(int n) { return (n << 2) | 0b10; }
43
44inline uint8_t getSocketRxBlock(int n) { return (n << 2) | 0b11; }
45
46namespace Common
47{
48
49namespace Irq
50{
51constexpr static uint8_t CONFLICT = 1 << 7;
52constexpr static uint8_t UNREACH = 1 << 6;
53constexpr static uint8_t PPPOE = 1 << 5;
54constexpr static uint8_t MP = 1 << 4;
55} // namespace Irq
56
58{
59 REG_MR = 0x0000, //< Mode Register.
60 REG_GAR = 0x0001, //< Gateway IP Address Register.
61 REG_SUBR = 0x0005, //< Subnet Mask Register.
62 REG_SHAR = 0x0009, //< Source Hardware Address Register.
63 REG_SIPR = 0x000f, //< Source IP Address Register.
64 REG_INTLEVEL = 0x0013, //< Interrupt Low Level Timer Register.
65 REG_IR = 0x0015, //< Interrupt Register.
66 REG_IMR = 0x0016, //< Interrupt Mask Register.
67 REG_SIR = 0x0017, //< Socket Interrupt Register.
68 REG_SIMR = 0x0018, //< Socket Interrupt Mask Register.
69 REG_RTR = 0x0019, //< Retry Time-value Register.
70 REG_PTIMER = 0x001C, //< PPP Link Control Protocol Request Timer Register.
71 REG_PMAGIC = 0x001D, //< PPP Link Control Protocol Magic number Register.
72 REG_PHAR = 0x001E, //< Destination Hardware Register in PPPoE mode.
73 REG_PSID = 0x0024, //< Session ID Register in PPPoE mode.
74 REG_PMRU = 0x0026, //< Maximum Receive Unit in PPPoE mode.
75 REG_UIPR = 0x0028, //< Unreachable IP Address Register.
76 REG_UPORTR = 0x002C, //< Unreachable Port Register.
77 REG_PHYCFGR = 0x002E, //< W5500 PHY Configuration Register.
78 REG_VERSIONR = 0x0039, //< W5500 Chip Version Register.
79};
80
81} // namespace Common
82
83namespace Socket
84{
85
86namespace Irq
87{
88constexpr static uint8_t SEND_OK = 1 << 4;
89constexpr static uint8_t TIMEOUT = 1 << 3;
90constexpr static uint8_t RECV = 1 << 2;
91constexpr static uint8_t DISCON = 1 << 1;
92constexpr static uint8_t CON = 1 << 0;
93} // namespace Irq
94
96{
97 CMD_OPEN = 0x01,
98 CMD_LISTEN = 0x02,
101 CMD_CLOSE = 0x10,
102 CMD_SEND = 0x20,
105 CMD_RECV = 0x40
107
124
126{
127 REG_MR = 0x0000, //< Socket n Mode Register.
128 REG_CR = 0x0001, //< Socket n Command Register.
129 REG_IR = 0x0002, //< Socket n Interrupt Register.
130 REG_SR = 0x0003, //< Socket n Status Register.
131 REG_PORT = 0x0004, //< Socket n Source Port Register.
132 REG_DHAR = 0x0006, //< Socket n Destination Hardware Address Register.
133 REG_DIPR = 0x000C, //< Socket n Destination IP Address Register.
134 REG_DPORT = 0x0010, //< Socket n Destination Port Register.
135 REG_MSSR = 0x0012, //< Socket n Maximum Segment Size Register.
136 REG_TOS = 0x0015, //< Socket n IP Type of Server Register.
137 REG_TTL = 0x0016, //< Socket n TTL Register.
138 REG_RXBUF_SIZE = 0x001E, //< Socket n RX Buffer Size Register.
139 REG_TXBUF_SIZE = 0x001F, //< Socket n TX Buffer Size Register.
140 REG_TX_FSR = 0x0020, //< Socket n TX Free Size Register.
141 REG_TX_RD = 0x0022, //< Socket n TX Read Pointer Register.
142 REG_TX_WR = 0x0024, //< Socket n TX Write Pointer Register.
143 REG_RX_RSR = 0x0026, //< Socket n Received Size Register.
144 REG_RX_RD = 0x0028, //< Socket n RX Read Data Pointer Register.
145 REG_RX_WR = 0x002A, //< Socket n RX Write Pointer Register.
146 REG_IMR = 0x002C, //< Socket n Interrupt Mask Register.
147 REG_FRAG = 0x002D, //< Socket n Fragment Register.
148 REG_KPALVTR = 0x002F, //< Socket n Keep Alive Time Register.
149};
150
151inline uint8_t buildModeUdp(bool enable_multicast, bool block_broadcast,
152 bool multicast_use_igmp_v1, bool block_unicast)
153{
154 return (enable_multicast ? 1 << 7 : 0) | (block_broadcast ? 1 << 6 : 0) |
155 (multicast_use_igmp_v1 ? 1 << 5 : 0) | (block_unicast ? 1 << 4 : 0) |
156 0b0010;
157}
158
159inline uint8_t buildModeTcp(bool enable_no_delayed_ack)
160{
161 return (enable_no_delayed_ack ? 1 << 5 : 0) | 0b0001;
162}
163
164inline uint8_t buildModeMacraw(bool enable_mac_filter, bool block_broadcast,
165 bool block_multicast, bool block_ipv6)
166{
167 return (enable_mac_filter ? 1 << 7 : 0) | (block_broadcast ? 1 << 6 : 0) |
168 (block_multicast ? 1 << 5 : 0) | (block_ipv6 ? 1 << 4 : 0) | 0b0100;
169}
170
171} // namespace Socket
172
173} // namespace Wiz
174
175}; // namespace Boardcore
uint8_t buildModeTcp(bool enable_no_delayed_ack)
uint8_t buildModeMacraw(bool enable_mac_filter, bool block_broadcast, bool block_multicast, bool block_ipv6)
uint8_t buildModeUdp(bool enable_multicast, bool block_broadcast, bool multicast_use_igmp_v1, bool block_unicast)
uint8_t buildControlWord(uint8_t block, bool write)
Definition WIZ5500Defs.h:35
uint8_t getSocketTxBlock(int n)
Definition WIZ5500Defs.h:42
uint8_t getSocketRxBlock(int n)
Definition WIZ5500Defs.h:44
uint8_t getSocketRegBlock(int n)
Definition WIZ5500Defs.h:40
Driver for the VN100S IMU.