- Generated by
1.10.0
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Skyward boardcore
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This is the configuration struct for a DMA transaction. More...
#include <DMA.h>
Public Types | |
| enum class | Direction : uint16_t { MEM_TO_MEM = DMA_SxCR_DIR_1 , MEM_TO_PER = DMA_SxCR_DIR_0 , PER_TO_MEM = 0 } |
| enum class | Priority : uint32_t { VERY_HIGH = DMA_SxCR_PL , HIGH = DMA_SxCR_PL_1 , MEDIUM = DMA_SxCR_PL_0 , LOW = 0 } |
| enum class | DataSize : uint8_t { BITS_8 = 0 , BITS_16 , BITS_32 } |
Public Attributes | |
| Direction | direction = Direction::MEM_TO_MEM |
| Priority | priority = Priority::LOW |
| DataSize | srcSize = DataSize::BITS_32 |
| DataSize | dstSize = DataSize::BITS_32 |
| volatile void * | srcAddress = nullptr |
| volatile void * | dstAddress = nullptr |
| volatile void * | secondMemoryAddress = nullptr |
| uint16_t | numberOfDataItems = 0 |
| bool | srcIncrement = false |
| bool | dstIncrement = false |
| bool | circularMode = false |
| Enables circular buffer mode. | |
| bool | doubleBufferMode = false |
| Enables double buffer mode. | |
| bool | enableTransferCompleteInterrupt = false |
| bool | enableHalfTransferInterrupt = false |
| bool | enableTransferErrorInterrupt = false |
| bool | enableFifoErrorInterrupt = false |
| bool | enableDirectModeErrorInterrupt = false |
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Priority of the DMA transaction. When multiple streams from the same controller (DMA1 or DMA2) are requested, they are served following the priority order. If two requests have the same software priority level, the stream with the lower number takes priority over the stream with the higher number. For example, Stream 2 takes priority over Stream 4.
| Enumerator | |
|---|---|
| VERY_HIGH | |
| HIGH | |
| MEDIUM | |
| LOW | |
| bool Boardcore::DMATransaction::circularMode = false |
| Direction Boardcore::DMATransaction::direction = Direction::MEM_TO_MEM |
| bool Boardcore::DMATransaction::doubleBufferMode = false |
| DataSize Boardcore::DMATransaction::dstSize = DataSize::BITS_32 |
| bool Boardcore::DMATransaction::enableDirectModeErrorInterrupt = false |
Direct mode is the default fifo operating mode.
Direct mode error can only be set in the peripheral-to-memory mode while operating in direct mode. This flag is set when a DMA request occurs while the previous data have not yet been fully transferred into the memory (because the memory bus was not granted). In this case, the flag indicates that 2 data items were be transferred successively to the same destination address, which could be an issue if the destination is not able to manage this situation.
| bool Boardcore::DMATransaction::enableFifoErrorInterrupt = false |
Fifo overrun/underrun condition.
In direct mode, the FIFO error flag can also be set under the following conditions:
| bool Boardcore::DMATransaction::enableHalfTransferInterrupt = false |
| bool Boardcore::DMATransaction::enableTransferCompleteInterrupt = false |
| bool Boardcore::DMATransaction::enableTransferErrorInterrupt = false |
The transfer error interrupt flag is set when:
| Priority Boardcore::DMATransaction::priority = Priority::LOW |
| volatile void* Boardcore::DMATransaction::secondMemoryAddress = nullptr |
| DataSize Boardcore::DMATransaction::srcSize = DataSize::BITS_32 |
1.10.0